1. Field of the Invention
The present invention relates to a semiconductor device including a thin film transistor (hereinafter referred to as TFT) using a microcrystalline silicon (hereinafter referred to as “μc-Si”) layer. Note that in this specification, a semiconductor device refers to a semiconductor element itself or a device including a semiconductor element. As an example of such a semiconductor element, a transistor (a thin film transistor and the like) is given. In addition, a semiconductor device also includes a display device such as a liquid crystal display device in its category.
2. Description of the Related Art
FIG. 6A is a plan view showing a conventional TFT using μc-Si. FIG. 6B is a cross-sectional view along a line A-B shown in FIG. 6A. FIG. 6C is a cross-sectional view along a line C-D shown in FIG. 6A.
A gate electrode 202 is formed over a substrate 201 and a gate insulating film 203 is formed to cover the gate electrode 202. A μc-Si layer 204 serving as a semiconductor layer is formed over the gate insulating film 203 and an amorphous silicon (hereinafter referred to as “a-Si”) layer 205 is formed over the μc-Si layer 204. An impurity silicon layer 206 is formed over the a-Si layer 205. Over the μc-Si layer 204, the stacked layer of the a-Si layer 205 and the impurity silicon layer 206 are separated into two. A source electrode 207a is formed over one of the stacked layers and a drain electrode 207b is formed over the other thereof.
The TFT shown in FIGS. 6A to 6C can operate at high speed because μc-Si having higher field-effect mobility than a-Si is used for the semiconductor layer. For this reason, when including the TFT shown in FIGS. 6A to 6C as a pixel TFT, a liquid crystal display panel can operate at high speed.
In the TFT shown in FIGS. 6A to 6C, when light leaking from the substrate 201 side enters the μc-Si layer 204, a leakage current is increased. Therefore, the TFT shown in FIGS. 6A to 6C is configured so as to block light entering the μc-Si layer 204 completely by covering the μc-Si layer 204 with the gate electrode 202. However, when the μc-Si layer 204 is covered with the gate electrode 202 in such a manner, the size of the gate electrode 202 is increased. Thus, increase in parasitic capacitance in overlapping portions 208 where the gate electrode 202 overlaps with each of the source electrode 207a and the drain electrode 207b impedes a high-speed operation of the transistor in some cases.
Further, recent liquid crystal displays have come to have higher resolution as well as higher operation speed. Such a high-resolution display panel including a large number of pixels is greatly affected by a load due to wiring resistance and parasitic capacitance between wirings and a load due to parasitic capacitance generated between a gate wiring and each of a source wiring and a drain wiring and between a gate electrode and each of a source electrode and a drain electrode. Therefore, it is difficult to achieve both high resolution and high-speed operation only by increasing the field-effect mobility of a pixel TFT.
In addition, the off-state leakage current of a pixel TFT of a liquid crystal display panel needs to be reduced. With a large off-state leakage current, charge accumulated in a storage capacitor of a pixel circuit is released, whereby an electric field applied to a liquid crystal is weakened; thus, a desired contrast cannot be obtained.
When a source electrode and a drain electrode are in contact with a μc-Si layer as shown in FIGS. 6A to 6C, a leakage current (off-state leakage current) may be generated between the source electrode and the drain electrode even when the TFT is in an off state. Furthermore, since μc-Si has a band gap of about 1.1 eV, which is small as compared to 1.4 eV to 1.8 eV, the band gap of a-Si, the off-state leakage current is increased when a high temperature is applied to a TFT using μc-Si or when the μc-Si of the TFT is irradiated with light.